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| This site contains information about the current activities of the Verilog Standards Group and it's sub-committees, the Behavioral Task Force (BTF), PLI Task Force (PTF) and the Errata Task Force (ETF). |
| The following documents have been created by the EGG: checklist.txt, guidelines.txt, and process_flow.pdf |
ETF minutes can be found here.
Summaries can be found for:
Detailed information on the current errata and enhancement requests can be found at the database page. The database will be updated as the ETF reviews enhancements and errata.
Email sent to the reflector is archived and can be searched.