ISSUE 438

Add Proposal  Add Analysis  Edit Class, Environment, or Release
Number 438
Category enhancement
Synopsis Verification extensions for Verilog
State open
Class enhancement
Arrival-DateAug 24 2003
Originator Yaron Kashai
Release 2005
Environment

Description
A proposal which adds Verification Extensions to Verilog, specifcally Generation, Coverage and Extention, which are more completely described in the attached powerpoint file.

Note that copyright assurance and patent assurance letters have been filed with the IEEE.
Fix

Audit-Trail
Unformatted
----web-attachment----
Verisity Verification Donation.ppt


Hosted by Boyd Technology