ISSUE 479

Number 479
Category errata
Synopsis 4.2.1 Vector bit-select and part-select addressing
State closed
Class duplicate
Arrival-DateSep 16 2003
Originator Krishna Garlapati <krishna@synplicity.com>
Release 2001b
Environment
duplicates 468
Description
In Section 4.2.1, page 53, the LRM says:

"The first two examples select bits starting at the base and ascending
the bit range. The number of
bits selected is equal to the width expression. The second two examples
select bits starting at the
base and descending the bit range."

There is no explanation of the term "starting at the base". It can be
inferred, but I think the explanation
should have been a little clear along the lines:

big_vect[lsb_base_expr+:width_expr] is to be read as
big_vect[lsb_base_expr+width_expr:lsb_base_expr]
if the range of big_vector is descending and
big_vect[lsb_base_expr:lsb_base_expr+width_expr] if the range
of big_vector is ascending.

I also think we should get rid of

reg [15:0] big_vect;
reg [0:15] little_vect;

and replace them with

reg [15:0] down_vect;
reg [0:15] up_vect;

The prefixes big and little make no meaning here given both are 15 bits
wide.


--
- Krishna Garlapati, Synplicity Inc. (408)215-6152


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