| Add Proposal | Add Analysis | Edit Class, Environment, or Release |
| Number | 501
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| Category | errata
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| Synopsis | library file_path syntax
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| State | open
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| Class | errata-discuss
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| Arrival-Date | Nov 05 2003
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| Originator | Shalom.Bresticker@motorola.com
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| Release | 2001b
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| Description |
This mail is to enter this issue(s) into the data base, Shalom. Date: Thu, 30 Oct 2003 16:23:56 -0800 (PST) From: Andy Tsay <andytsay@yahoo.com> To: sv-bc@eda.org Subject: [sv-bc] Need help on "library file_path syntax" Is the following library declaration legal syntax? library mylib /*.a_comment_or_not1.*/ /*.a_comment_or_not2.*/ ; If yes, how to interpret it? |
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| Audit-Trail |
From: Shalom.Bresticker@motorola.com To: etf-bugs@boyd.com Cc: Subject: Re: errata/501: library file_path syntax Date: Wed, 5 Nov 2003 10:59:45 +0200 (IST) Here is the entire discussion till now, Shalom. Date: Thu, 30 Oct 2003 16:23:56 -0800 (PST) From: Andy Tsay <andytsay@yahoo.com> To: sv-bc@eda.org Subject: [sv-bc] Need help on "library file_path syntax" Is the following library declaration legal syntax? library mylib /*.a_comment_or_not1.*/ /*.a_comment_or_not2.*/ ; If yes, how to interprete it? Date: Fri, 31 Oct 2003 09:26:58 -0600 From: Adam Krolnik <krolnik@lsil.com> IEEE1364-2001 did not include comment delimiters "/*" and "*/" in the library file definitions. Thus /*.a_comment_or_not1.*/ is expected to be a file. The reasoning is that /user/andy/lib/*.v is expected to be a path, not a path and a comment. Date: Fri, 31 Oct 2003 11:36:21 -0500 (EST) From: Steven Sharp <sharp@cadence.com> I believe that SV is allowing library mapping to be specified in the Verilog source. And since Verilog source can have comments, that leads to this problem. I think that allowing library mapping in the Verilog source is going in the wrong direction. The IEEE VSG is considering going the other direction, and only allowing configs in the lib.map file, not the Verilog source. Date: Fri, 31 Oct 2003 11:40:39 -0800 (PST) From: Andy Tsay <andytsay@yahoo.com> Thanks for the inputs. The examples on page 201 (IEEE 1364-2001 LRM) show uses of // comments. Also the same LRM, Section 13.2.2 third paragraph says: The syntax of a lib.map file is limited to library specifications, include statements, and standard Verilog comment syntax. So, standard Verilog comment syntax is allowed in a lib.map file, and reverting SV to Vlog-2001 does not seem to help in the solution. Can we enhance library_declaration syntax by adding <> around the file_path_spec? This will also be consistent with the syntax of include_statement. Original Syntax: library_declaration ::= library library_identifier file_path_spec [ { , file_path_spec } ] [ -incdir file_path_spec [ { , file_path_spec } ] ; include_statement ::= include <file_path_spec> ; Proposed Syntax: library_declaration ::= library library_identifier <file_path_spec> [ { , <file_path_spec> } ] [ -incdir <file_path_spec> [ { , <file_path_spec> } ] ; include_statement ::= include <file_path_spec> ; Date: Fri, 31 Oct 2003 12:24:35 -0800 From: Brad Pierce <Brad.Pierce@synopsys.com> There are no <> in the include_statement either -- http://www.boyd.com/1364_btf/report/full_pr/462.html http://www.eda.org/sv-bc/hm/att-1100/01-BNF_reconciliation2.htm Date: Fri, 31 Oct 2003 12:30:25 -0800 From: Eric Olson <eolson@cisco.com> The lib.map file is a single file (plus includes) that is parsed before any verilog files read. It is probably not a good idea to allow verilog in the lib.map file and meaningless to inlcude lib.map code in verilog source. (it is too late) There are no scoping rules for libmap libraries, it is a single flat file. Allowing for lib.map data in multiple files is a serious extension to the standard that needs to be more carefully planned. As for the /* comments */, I personally thing they should be allowed in the lib.map file. (you can share the preprocessor). All 'file_path_spec's should be strings. The "<" and ">" in the include statement was a typo in the verilog 2K standard. Traditionally (C++, etc) <file> is a file name that can be found in the library search path. Using a string allows all files systems to name files using whatever characters they wish. Date: Fri, 31 Oct 2003 15:49:45 -0500 (EST) From: Steven Sharp <sharp@cadence.com> >So, standard Verilog comment syntax is allowed in a lib.map file, and >reverting SV to Vlog-2001 does not seem to help in the solution. I think this issue has been raised in the IEEE 1364 ETF, but don't know what the status is. Since Cadence has an implementation, I can find out what we did about this. >Can we enhace library_declaration syntax by adding <> around the >file_path_spec? Using quotes would be more consistent with the existing language syntax. >This will also be consistent with the syntax of include_statement. As Brad points out, the <> in the syntax of include_statement is a typo. Date: Fri, 31 Oct 2003 16:05:57 -0500 (EST) From: Steven Sharp <sharp@cadence.com> Apparently our implementation allows optional quotes around the file_path. If the file_path contains things like /* or //, then the quotes are mandatory to prevent them from being interpreted as comment characters. Date: Sun, 2 Nov 2003 06:51:54 -0500 From: Jay Lawrence <lawrence@cadence.com> SystemVerilog added the <> syntax for `include (section 24.3). This was done so that the definition of "List.vh" could be included in the language as : `include <List.vh> Note, now that we are discussing packages, this list functionality (and all the other built-in types/classes) should probably be consolidated as packages and maybe we should eliminate this. |
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