Services and Products
We have architected and aided in the implementation of entire
verification environments. Because we are experienced with
Hardware Verification Languages as well as Verilog, we can use
the tools that best fit your need. Whether you are performing
verification with simple Verilog, custom PLI, SUPERLOG®, VERA,
or Specman Elite, we can help. Our founder's involvement with Verilog
and Superlog standardization give us the edge on language
enhancements that improve verification. Superlog
enhancements to Verilog have been donated to Accellera's HDL+
Working Group in which we participate. We are also a Verisity
Verification Alliance member.
Our verification environment specifications establish a methodology that ensures greater productivity and more effective testing of the design. Our founder, Mr. Boyd has written conference papers that illustrate the methodology we promote. These papers give examples of VERA and SUPERLOG® verification methodologies.
This methodology is critical to our ability to create tests under tight time constraints that achieve very thorough and automated testing.
Vera is a trademark of Synopsys